(1) Field
This invention relates to a data processing device, a data processing chain comprising such a device, a data processing method and a corresponding computer program.
The invention more specifically applies to the field of digital signal processing, in particular but not exclusively for audio/video transmission encoding/decoding or data transmission according to a wired or wireless communication protocol.
The following terminology will be used throughout the text, as well as in the claims.
A “programmed processing unit” is a processing unit designed to execute a computer program, i.e. to read instructions and execute them.
A “hardware processing unit” is an electronic circuit designed to perform one or more predefined and fixed processing operations. The processing is defined by the organization of components in the processing unit. A hardware processing unit is, for example, a machine with hardware states and registries.
A “pointer” is a data item indicating a memory address, either directly (the data item is the memory address), or indirectly (the data item is, for example, the address of a location where the indicated memory address is written). To illustrate which location is indicated by a pointer, this pointer will be represented in the figures next to the location.
The phrase “to free data” means defining the location where it is written as free space, so that a new data item can be written there.
(2) Description of the Related Art
A “primitive” is a computing function, i.e. a set of instructions, written so as to take advantage, as much as possible, of the particular characteristics of the hardware intended to execute it. It is also said to be a “basic” function, by contrast with advanced functions written generically without taking into account particular characteristics of the hardware on which they can be executed.
To process data, it is known to use a device comprising (i) a memory, (ii) a direct memory access controller comprising a receiving module designed to receive data coming from outside the device and to write it in a predetermined portion of the memory, called the main buffer memory, and (iii) a processing unit programmed to read and process data written by the receiving module in the main buffer memory.
Indeed, a direct memory access controller or DMA controller makes it possible to transfer data to be processed or provided by the processing unit, coming from or going to a peripheral such as a communication port, a hard disk or any memory, between this peripheral and a local memory of the device, for example, without intervention of the processing unit except to initiate and conclude the transfer.
A DMA controller is, for example, very useful in a system wherein repeated fast access to peripherals may otherwise almost block or at least slow the processing performed by the processing unit. Its presence optimizes the processing time of the software applications executed by the processing unit by letting the DMA controller manage the data transfers from and to the local memory.
In addition, the processing unit implements a computer program to perform the data processing, so that it is relatively easy to modify the processing by modifying the program, or even completely change it by having another program executed with the processing unit. Thus, the processing device with the programmed processing unit is very flexible.
Moreover, it is known to form a “data flow” processing chain with hardware units connected to one another. In such an architecture, data continuously passes from one unit to another: there is no interruption of the flow.
To provide flexibility in the processing chain, it may be beneficial to insert a programmed processing unit into the processing chain.
However, a programmed processing unit needs to have access to a certain predetermined number of data items at the same time in order to perform each step of its processing, so that it risks interrupting the data flow and degrading the performance of the processing chain, or even producing errors in the processing chain, insofar as it does not have access to all of this data.
In addition, the publication of the patent application No. US 2009/0235019A1 describes a system equipped with a DMA module and a processor saving data in a lockable memory.
It may thus be desired to provide a processing device, comprising a programmed processing unit, suitable for being integrated in a data flow processing chain.